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Message-ID:
<PUZPR06MB5887C8086DBE7A5D6BF261C4EFF6A@PUZPR06MB5887.apcprd06.prod.outlook.com>
Date: Fri, 17 Oct 2025 01:43:17 +0000
From: Gary Yang <gary.yang@...tech.com>
To: Linus Walleij <linus.walleij@...aro.org>
CC: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>, cix-kernel-upstream
<cix-kernel-upstream@...tech.com>
Subject:
回复: [PATCH v3 2/3] pinctrl: cix: Add pin-controller support for sky1
Hi Linus,
I'm glad to see your kind comments
>
> EXTERNAL EMAIL
>
> On Thu, Oct 16, 2025 at 7:4 AM Gary Yang <gary.yang@...tech.com> wrote:
>
> > GPIO IP on Sky1 is Cadence, not Synopsys designware. We wants to do it
> > when upstream GPIO driver in the future.
> > Are you agree?
>
> Yes no problem. (I misremembered that it was Cadence, not Synopsys...)
>
> When I look at the Cadence driver I see it needs some modifications if it should
> work properly with GPIO ranges and interoperate with pin controllers. It needs
> to call gpiochip_generic_request() and
> gpiochip_generic_free() from its request/free functions, and preferably also
> gpiochip_generic_config() which will extend the gpiolib to call down to the pin
> controller and take control over line properties.
>
> But let's do that in a separate patch!
>
Thanks for your remind and understandings. We need focus on modifying dt-bindings file, and
hope merge pinctrl driver as soon as possible. We will take it consider when upstream GPIO driver later.
> Yours,
> Linus Walleij
Best wishes
Gary
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