linux-kernel - Re: [PATCH v1 4/5] thermal/drivers/mediatek/lvts

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Message-ID: <6f71b834-2b4d-48a8-be6f-1efdf0e78812@collabora.com>
Date: Mon, 27 Oct 2025 11:45:34 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Frank Wunderlich <linux@...web.de>, "Rafael J. Wysocki"
 <rafael@...nel.org>, Daniel Lezcano <daniel.lezcano@...aro.org>,
 Zhang Rui <rui.zhang@...el.com>, Lukasz Luba <lukasz.luba@....com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
 Nícolas F. R. A. Prado <nfraprado@...labora.com>,
 Mason Chang <mason-cw.chang@...iatek.com>,
 Uwe Kleine-König <u.kleine-koenig@...libre.com>,
 Balsam CHIHI <bchihi@...libre.com>, linux-pm@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v1 4/5] thermal/drivers/mediatek/lvts_thermal: Add SoC
 based golden Temp

Il 26/10/25 13:21, Frank Wunderlich ha scritto:
> From: Frank Wunderlich <frank-w@...lic-files.de>
> 
> Add SoC based golden temp for invalid efuse data.
> 
> This is a preliminary patch for mt7987 support where goldentemp is
> slightly higher than other SOCs.
> 

I've found this "hack" required for all of the preproduction SoCs, as those are
usually unfused and/or missing at least some calibration parameters.

Are you using an early/preproduction/whatever SoC, or are you testing on a retail
board?

Regards,
Angelo

> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
>   drivers/thermal/mediatek/lvts_thermal.c | 13 ++++++++++++-
>   1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
> index 9413b30f7b69..544941e8219a 100644
> --- a/drivers/thermal/mediatek/lvts_thermal.c
> +++ b/drivers/thermal/mediatek/lvts_thermal.c
> @@ -134,6 +134,7 @@ struct lvts_data {
>   	int num_init_cmd;
>   	int temp_factor;
>   	int temp_offset;
> +	int golden_temp;
>   	int gt_calib_bit_offset;
>   	unsigned int def_calibration;
>   	bool irq_enable;
> @@ -811,8 +812,10 @@ static int lvts_golden_temp_init(struct device *dev, u8 *calib,
>   	gt = (((u32 *)calib)[0] >> lvts_data->gt_calib_bit_offset) & 0xff;
>   
>   	/* A zero value for gt means that device has invalid efuse data */
> -	if (gt && gt < LVTS_GOLDEN_TEMP_MAX)
> +	if (gt && gt <= LVTS_GOLDEN_TEMP_MAX)
>   		golden_temp = gt;
> +	else
> +		golden_temp = lvts_data->golden_temp;
>   
>   	golden_temp_offset = golden_temp * 500 + lvts_data->temp_offset;
>   
> @@ -1786,6 +1789,7 @@ static const struct lvts_data mt7988_lvts_ap_data = {
>   	.num_init_cmd	= ARRAY_SIZE(mt7988_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT7988,
>   	.temp_offset	= LVTS_COEFF_B_MT7988,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.irq_enable = true, //SDK false
>   };
> @@ -1799,6 +1803,7 @@ static const struct lvts_data mt8186_lvts_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT7988,
>   	.temp_offset	= LVTS_COEFF_B_MT7988,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.def_calibration = 19000,
>   	.irq_enable = true,
> @@ -1813,6 +1818,7 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 20,
>   	.def_calibration = 35000,
>   	.irq_enable = true,
> @@ -1827,6 +1833,7 @@ static const struct lvts_data mt8188_lvts_ap_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 20,
>   	.def_calibration = 35000,
>   	.irq_enable = true,
> @@ -1841,6 +1848,7 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.def_calibration = 35000,
>   	.irq_enable = true,
> @@ -1855,6 +1863,7 @@ static const struct lvts_data mt8192_lvts_ap_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.def_calibration = 35000,
>   	.irq_enable = true,
> @@ -1869,6 +1878,7 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.def_calibration = 35000,
>   	.irq_enable = true,
> @@ -1883,6 +1893,7 @@ static const struct lvts_data mt8195_lvts_ap_data = {
>   	.num_init_cmd	= ARRAY_SIZE(default_init_cmds),
>   	.temp_factor	= LVTS_COEFF_A_MT8195,
>   	.temp_offset	= LVTS_COEFF_B_MT8195,
> +	.golden_temp	= LVTS_GOLDEN_TEMP_DEFAULT,
>   	.gt_calib_bit_offset = 24,
>   	.def_calibration = 35000,
>   };