linux-kernel - Re: [PATCH 00/19] Add RZ/G3E RSCI support

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Message-ID: <2025102802-clay-turbine-9562@gregkh>
Date: Tue, 28 Oct 2025 09:41:31 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: Biju Das <biju.das.jz@...renesas.com>
Cc: Jiri Slaby <jirislaby@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	Wolfram Sang <wsa+renesas@...g-engineering.com>,
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>,
	Nam Cao <namcao@...utronix.de>, linux-kernel@...r.kernel.org,
	linux-serial@...r.kernel.org, Biju Das <biju.das.au@...il.com>,
	linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH 00/19] Add RZ/G3E RSCI support

On Mon, Oct 27, 2025 at 03:45:47PM +0000, Biju Das wrote:
> Add RZ/G3E RSCI support for FIFO and non-FIFO mode. RSCI IP found on
> RZ/G3E SoC is similar to one on RZ/T2H, but has 32-stage fifo. RZ/G3E has
> 5 module clocks compared to 2 on RZ/T2H, and it has multiple resets.
> Add support for hardware flow control.
> 
> Biju Das (19):
>   clk: renesas: r9a09g047: Add RSCI clocks/resets

Why is a clk patch part of a serial series?  How are we supposed to
merge this thing?

thanks,

greg k-h