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Message-ID: <2f18ba6b-ff82-4c6f-8a6d-154886dafd48@oss.qualcomm.com>
Date: Thu, 20 Nov 2025 10:19:09 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Taniya Das <taniya.das@....qualcomm.com>,
Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd
<sboyd@...nel.org>,
Rajendra Nayak <quic_rjendra@...cinc.com>,
Abel Vesa <abel.vesa@...aro.org>,
Konrad Dybcio <konradybcio@...nel.org>,
Sibi Sankar <sibi.sankar@....qualcomm.com>
Cc: Ajit Pandey <ajit.pandey@....qualcomm.com>,
Imran Shaik <imran.shaik@....qualcomm.com>,
Jagadeesh Kona <jagadeesh.kona@....qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: qcom: gcc-x1e80100: Use BRANCH_HALT_DELAY for UFS
PHY symbol
On 11/19/25 6:53 PM, Taniya Das wrote:
> Switch the halt_check method from BRANCH_HALT to BRANCH_HALT_DELAY for
> gcc_ufs_phy_rx_symbol_0_clk, gcc_ufs_phy_rx_symbol_1_clk, and
> gcc_ufs_phy_tx_symbol_0_clk. These clocks are externally sourced and do
> not require polling for halt status.
>
> Fixes: 161b7c401f4b ("clk: qcom: Add Global Clock controller (GCC) driver for X1E80100")
> Signed-off-by: Taniya Das <taniya.das@....qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Konrad
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