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Message-ID: <42bbdec7-ce6d-417c-a13d-ce0a6782bc9a@kernel.org>
Date: Sun, 30 Nov 2025 09:24:57 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>,
 tomm.merciai@...il.com
Cc: linux-renesas-soc@...r.kernel.org, biju.das.jz@...renesas.com,
 Andrzej Hajda <andrzej.hajda@...el.com>,
 Neil Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
 Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
 Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
 Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
 Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Geert Uytterhoeven <geert+renesas@...der.be>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Magnus Damm <magnus.damm@...il.com>,
 dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 09/22] dt-bindings: display: bridge: renesas,dsi: Add
 support for RZ/G3E SoC

On 26/11/2025 15:07, Tommaso Merciai wrote:
> The MIPI DSI interface on the RZ/G3E SoC is nearly identical to that of
> the RZ/V2H(P) SoC, except that this have 2 input port and can use vclk1
> or vclk2 as DSI Video clock, depending on the selected port.
> 
> To accommodate these differences, a SoC-specific
> `renesas,r9a09g047-mipi-dsi` compatible string has been added for the
> RZ/G3E SoC.
> 
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
> ---
>  .../bindings/display/bridge/renesas,dsi.yaml  | 120 +++++++++++++++---
>  1 file changed, 101 insertions(+), 19 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> index c20625b8425e..9917b494a9c9 100644
> --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> @@ -28,6 +28,7 @@ properties:
>            - const: renesas,r9a09g057-mipi-dsi
>  
>        - enum:
> +          - renesas,r9a09g047-mipi-dsi # RZ/G3E
>            - renesas,r9a09g057-mipi-dsi # RZ/V2H(P)
>  
>    reg:
> @@ -84,6 +85,13 @@ properties:
>            - const: pclk
>            - const: vclk
>            - const: lpclk
> +      - items:
> +          - const: pllrefclk
> +          - const: aclk
> +          - const: pclk
> +          - const: vclk1
> +          - const: vclk2
> +          - const: lpclk

Why are you creating completely new lists every time?

No, come with unified approach.

Best regards,
Krzysztof

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