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Message-ID: <20251221-futuristic-masked-platypus-dfdac4@quoll>
Date: Sun, 21 Dec 2025 16:08:35 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Alex Tran <alex.t.tran@...il.com>
Cc: mchehab@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, pavel@...nel.org, sakari.ailus@...ux.intel.com,
mehdi.djait@...ux.intel.com, laurent.pinchart@...asonboard.com, hverkuil+cisco@...nel.org,
linux-media@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 2/2] media: dt-bindings: ti,omap3isp: Convert to DT
schema
On Sat, Dec 20, 2025 at 02:03:25PM -0800, Alex Tran wrote:
Thank you for your patch. There is something to discuss/improve.
> +maintainers:
> + - Laurent Pinchart <laurent.pinchart@...asonboard.com>
> + - Sakari Ailus <sakari.ailus@....fi>
> +
> +description:
> + The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.
> +
> +properties:
> + compatible:
> + const: ti,omap3-isp
> +
> + reg:
> + items:
> + - description: Core ISP registers up to the end of the SBL block
> + - description: CSI PHYs and receivers registers
> +
> + interrupts:
> + maxItems: 1
> + description: the ISP interrupt specifier
Drop description, obvious.
> +
> + iommus:
> + maxItems: 1
> + description: phandle and IOMMU specifier for the IOMMU that serves the ISP
Ditto
> +
> + syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle-array
> + items:
> + - items:
> + - description: phandle to System Control Module
> + - description: register offset to Complex I/O or CSI-PHY register
> + description:
> + Phandle and register offset to the Complex I/O or CSI-PHY register
> +
> + ti,phy-type:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
> + description:
> + 0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
> + 1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)
> +
> + '#clock-cells':
> + const: 1
> + description:
> + The ISP provides two external clocks, cam_xclka and cam_xclkb,
> + at indices 0 and 1 respectively.
> +
> + vdd-csiphy1-supply:
> + description: Voltage supply of the CSI-2 PHY 1
> +
> + vdd-csiphy2-supply:
> + description: Voltage supply of the CSI-2 PHY 2
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> +
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: Parallel (CCDC) interface
> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: |
> + CSIPHY1 interface:
> + OMAP 3630: CSI2C / CCP2B
> + OMAP 3430: CSI1 (CSIb)
> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + lane-polarities:
> + description: |
> + The lane polarity (required on CSI-2):
> + 0 - not inverted
> + 1 - inverted
You do not need to describe standard properties. Are the values
different than what video-interfaces define?
Same everywhere else. Look at other bindings how these properties should
be defined/written.
> + minItems: 2
> + maxItems: 3
> + items:
> + enum: [0, 1]
> +
> + data-lanes:
> + description: Data lanes (required on CSI-2)
> + minItems: 1
> + maxItems: 2
> + items:
> + minimum: 1
> + maximum: 3
> +
> + clock-lanes:
> + description: The clock lane (required on CSI-2)
> + maxItems: 1
> + items:
> + minimum: 1
> + maximum: 3
> +
> + port@2:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> + description: |
> + CSIPHY2 interface:
> + OMAP 3630: CSI2A / CCP2B
> + OMAP 3430: CSI2 (CSIa)
> +
> + properties:
> + endpoint:
> + $ref: /schemas/media/video-interfaces.yaml#
> + unevaluatedProperties: false
> +
> + properties:
> + lane-polarities:
> + description: |
> + The lane polarity (required on CSI-2):
> + 0 - not inverted
> + 1 - inverted
> + minItems: 2
> + maxItems: 3
> + items:
> + enum: [0, 1]
> +
> + data-lanes:
> + description: Data lanes (required on CSI-2)
> + minItems: 1
> + maxItems: 2
> + items:
> + minimum: 1
> + maximum: 3
> +
> + clock-lanes:
> + description: The clock lane (required on CSI-2)
> + maxItems: 1
> + items:
> + minimum: 1
> + maximum: 3
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - iommus
> + - syscon
> + - ti,phy-type
> + - '#clock-cells'
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/media/omap3-isp.h>
> +
> + isp@...bc000 {
> + compatible = "ti,omap3-isp";
> + reg = <0x480bc000 0x12fc>,
> + <0x480bd800 0x0600>;
> + interrupts = <24>;
> + iommus = <&mmu_isp>;
> + syscon = <&scm_conf 0x2f0>;
> + ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
> + #clock-cells = <1>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
Make example complete, please.
Best regards,
Krzysztof
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