| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20260126141543.2527-1-ethantidmore06@gmail.com>
Date: Mon, 26 Jan 2026 08:15:43 -0600
From: Ethan Tidmore <ethantidmore06@...il.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: linux-staging@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Michael Straube <straube.linux@...il.com>,
Hans de Goede <hansg@...nel.org>,
Akiyoshi Kurita <weibu@...admin.org>,
Dan Carpenter <dan.carpenter@...aro.org>,
Ethan Tidmore <ethantidmore06@...il.com>
Subject: [PATCH v1] staging: rtl8723bs: rename members of struct registry_priv
Rename CamelCase members of struct registry_priv to snake_case to
comply with the Linux kernel coding style.
As some of these renames result in longer variable names, use a local
pointer in deeply nested functions to avoid exceeding the 100-column
limit and fix block braces where necessary to maintain style
consistency.
Signed-off-by: Ethan Tidmore <ethantidmore06@...il.com>
---
.../staging/rtl8723bs/hal/hal_com_phycfg.c | 16 ++++++----
.../staging/rtl8723bs/hal/rtl8723b_phycfg.c | 32 ++++++++-----------
drivers/staging/rtl8723bs/include/drv_types.h | 18 +++++------
.../rtl8723bs/include/hal_com_phycfg.h | 2 +-
drivers/staging/rtl8723bs/os_dep/os_intfs.c | 12 +++----
5 files changed, 39 insertions(+), 41 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
index cd76e26e8..450bd2e38 100644
--- a/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/hal_com_phycfg.c
@@ -573,8 +573,9 @@ s8 PHY_GetTxPowerByRate(struct adapter *padapter, u8 RFPath, u8 Rate)
s8 value = 0;
u8 rateIndex = PHY_GetRateIndexOfTxPowerByRate(Rate);
- if ((padapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory == 2) ||
- padapter->registrypriv.RegEnableTxPowerByRate == 0)
+ if ((padapter->registrypriv.reg_enable_tx_power_by_rate == 2 &&
+ pHalData->EEPROMRegulatory == 2) ||
+ padapter->registrypriv.reg_enable_tx_power_by_rate == 0)
return 0;
if (RFPath >= RF_PATH_MAX)
@@ -690,12 +691,12 @@ s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel,
struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
s8 limits[10] = {0}; u8 i = 0;
- if (((adapter->registrypriv.RegEnableTxPowerLimit == 2) &&
+ if (((adapter->registrypriv.reg_enable_tx_power_limit == 2) &&
(hal_data->EEPROMRegulatory != 1)) ||
- (adapter->registrypriv.RegEnableTxPowerLimit == 0))
+ (adapter->registrypriv.reg_enable_tx_power_limit == 0))
return MAX_POWER_INDEX;
- switch (adapter->registrypriv.RegPwrTblSel) {
+ switch (adapter->registrypriv.reg_pwr_tbl_sel) {
case 1:
idx_regulation = TXPWR_LMT_ETSI;
break;
@@ -750,7 +751,8 @@ s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel,
void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
{
- struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
+ struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
+ struct registry_priv *r = &Adapter->registrypriv;
u8 BW40PwrBasedBm2_4G = 0x2E;
u8 regulation, bw, channel, rateSection;
s8 tempValue = 0, tempPwrLmt = 0;
@@ -771,7 +773,7 @@ void PHY_ConvertTxPowerLimitToPowerIndex(struct adapter *Adapter)
else if (rateSection == 0) /* CCK */
BW40PwrBasedBm2_4G = PHY_GetTxPowerByRateBase(Adapter, rfPath, CCK);
} else
- BW40PwrBasedBm2_4G = Adapter->registrypriv.RegPowerBase * 2;
+ BW40PwrBasedBm2_4G = r->reg_power_base * 2;
if (tempPwrLmt != MAX_POWER_INDEX) {
tempValue = tempPwrLmt - BW40PwrBasedBm2_4G;
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
index d8709d40c..897c3f98e 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
@@ -338,13 +338,11 @@ static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
/* Read Tx Power Limit File */
PHY_InitTxPowerLimit(Adapter);
- if (
- Adapter->registrypriv.RegEnableTxPowerLimit == 1 ||
- (Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1)
- ) {
- ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv,
- CONFIG_RF_TXPWR_LMT, 0);
- }
+
+ if (Adapter->registrypriv.reg_enable_tx_power_limit == 1 ||
+ (Adapter->registrypriv.reg_enable_tx_power_limit == 2 &&
+ pHalData->EEPROMRegulatory == 1))
+ ODM_ConfigRFWithHeaderFile(&pHalData->odmpriv, CONFIG_RF_TXPWR_LMT, 0);
/* */
/* 1. Read PHY_REG.TXT BB INIT!! */
@@ -353,20 +351,18 @@ static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
/* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */
PHY_InitTxPowerByRate(Adapter);
- if (
- Adapter->registrypriv.RegEnableTxPowerByRate == 1 ||
- (Adapter->registrypriv.RegEnableTxPowerByRate == 2 && pHalData->EEPROMRegulatory != 2)
- ) {
- ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv,
- CONFIG_BB_PHY_REG_PG);
+
+ if (Adapter->registrypriv.reg_enable_tx_power_by_rate == 1 ||
+ (Adapter->registrypriv.reg_enable_tx_power_by_rate == 2 &&
+ pHalData->EEPROMRegulatory != 2)) {
+ ODM_ConfigBBWithHeaderFile(&pHalData->odmpriv, CONFIG_BB_PHY_REG_PG);
if (pHalData->odmpriv.PhyRegPgValueType == PHY_REG_PG_EXACT_VALUE)
PHY_TxPowerByRateConfiguration(Adapter);
- if (
- Adapter->registrypriv.RegEnableTxPowerLimit == 1 ||
- (Adapter->registrypriv.RegEnableTxPowerLimit == 2 && pHalData->EEPROMRegulatory == 1)
- )
+ if (Adapter->registrypriv.reg_enable_tx_power_limit == 1 ||
+ (Adapter->registrypriv.reg_enable_tx_power_limit == 2 &&
+ pHalData->EEPROMRegulatory == 1))
PHY_ConvertTxPowerLimitToPowerIndex(Adapter);
}
@@ -541,7 +537,7 @@ u8 PHY_GetTxPowerIndex(
limit = phy_get_tx_pwr_lmt(
padapter,
- padapter->registrypriv.RegPwrTblSel,
+ padapter->registrypriv.reg_pwr_tbl_sel,
pHalData->CurrentChannelBW,
RFPath,
Rate,
diff --git a/drivers/staging/rtl8723bs/include/drv_types.h b/drivers/staging/rtl8723bs/include/drv_types.h
index f86180dc3..a63eb722c 100644
--- a/drivers/staging/rtl8723bs/include/drv_types.h
+++ b/drivers/staging/rtl8723bs/include/drv_types.h
@@ -156,15 +156,15 @@ struct registry_priv {
u8 notch_filter;
/* define for tx power adjust */
- u8 RegEnableTxPowerLimit;
- u8 RegEnableTxPowerByRate;
- u8 RegPowerBase;
- u8 RegPwrTblSel;
- s8 TxBBSwing_2G;
- u8 AmplifierType_2G;
- u8 bEn_RFE;
- u8 RFE_Type;
- u8 check_fw_ps;
+ u8 reg_enable_tx_power_limit;
+ u8 reg_enable_tx_power_by_rate;
+ u8 reg_power_base;
+ u8 reg_pwr_tbl_sel;
+ s8 tx_bb_swing_2g;
+ u8 amplifier_type_2g;
+ u8 b_en_rfe;
+ u8 rfe_type;
+ u8 check_fw_ps;
u8 qos_opt_enable;
diff --git a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
index cb7c7ed74..deb5ec16f 100644
--- a/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
+++ b/drivers/staging/rtl8723bs/include/hal_com_phycfg.h
@@ -90,7 +90,7 @@ void PHY_TxPowerByRateConfiguration(struct adapter *padapter);
u8 PHY_GetTxPowerIndexBase(struct adapter *padapter, u8 RFPath, u8 Rate,
enum channel_width BandWidth, u8 Channel);
-s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 RegPwrTblSel,
+s8 phy_get_tx_pwr_lmt(struct adapter *adapter, u32 reg_pwr_tbl_sel,
enum channel_width Bandwidth, u8 RfPath, u8 DataRate,
u8 Channel);
diff --git a/drivers/staging/rtl8723bs/os_dep/os_intfs.c b/drivers/staging/rtl8723bs/os_dep/os_intfs.c
index bc02db137..b67b4997f 100644
--- a/drivers/staging/rtl8723bs/os_dep/os_intfs.c
+++ b/drivers/staging/rtl8723bs/os_dep/os_intfs.c
@@ -259,13 +259,13 @@ static void loadparam(struct adapter *padapter, struct net_device *pnetdev)
registry_par->notch_filter = (u8)rtw_notch_filter;
- registry_par->RegEnableTxPowerLimit = (u8)rtw_tx_pwr_lmt_enable;
- registry_par->RegEnableTxPowerByRate = (u8)rtw_tx_pwr_by_rate;
+ registry_par->reg_enable_tx_power_limit = (u8)rtw_tx_pwr_lmt_enable;
+ registry_par->reg_enable_tx_power_by_rate = (u8)rtw_tx_pwr_by_rate;
- registry_par->RegPowerBase = 14;
- registry_par->TxBBSwing_2G = 0xFF;
- registry_par->bEn_RFE = 1;
- registry_par->RFE_Type = 64;
+ registry_par->reg_power_base = 14;
+ registry_par->tx_bb_swing_2g = 0xFF;
+ registry_par->b_en_rfe = 1;
+ registry_par->rfe_type = 64;
registry_par->qos_opt_enable = (u8)rtw_qos_opt_enable;
--
2.52.0
Powered by blists - more mailing lists