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Message-ID: <b12b05b0-154b-46a7-a760-cf0bdf67a8b9@sirena.org.uk>
Date: Wed, 28 Jan 2026 17:08:28 +0000
From: Mark Brown <broonie@...nel.org>
To: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Alexander Stein <alexander.stein@...tq-group.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Dong Aisheng <aisheng.dong@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
Yassine Oudjana <y.oudjana@...tonmail.com>,
Laura Nao <laura.nao@...labora.com>,
NĂcolas F. R. A. Prado <nfraprado@...labora.com>,
Chia-I Wu <olvaffe@...il.com>, Chen-Yu Tsai <wenst@...omium.org>,
kernel@...labora.com, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v3 1/5] clk: Respect CLK_OPS_PARENT_ENABLE during recalc
On Wed, Jan 28, 2026 at 05:31:35PM +0100, Nicolas Frattaroli wrote:
> On Wednesday, 28 January 2026 16:21:47 Central European Standard Time Mark Brown wrote:
> > > [ 1.478360] __clk_core_init: enabling parent sys_pll2_500m for arm_a53_div
> > > [ 1.485259] __clk_core_init: disabling parent sys_pll2_500m for arm_a53_div
> > As expected same result on i.MX8MP-EVK.
> This one puzzles me a little. arm_a53_div is neither marked critical
> nor is its parent. If arm_a53_div is required for the system to function,
> then I'd have expected at least it to be marked as critical, allowing us
> to do the workaround in init I proposed as an alternate solution for the
> stm32mp1 in my other reply.
Given that all the cores in the system are A53s I rather fear that it is
in fact critical and should be marked as such.
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