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Message-ID: <20260210184016.GP2995752@noisy.programming.kicks-ass.net>
Date: Tue, 10 Feb 2026 19:40:16 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Cc: Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	Namhyung Kim <namhyung@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Ian Rogers <irogers@...gle.com>,
	Adrian Hunter <adrian.hunter@...el.com>,
	Jiri Olsa <jolsa@...nel.org>,
	Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
	Andi Kleen <ak@...ux.intel.com>,
	Eranian Stephane <eranian@...gle.com>,
	Mark Rutland <mark.rutland@....com>, broonie@...nel.org,
	Ravi Bangoria <ravi.bangoria@....com>, linux-kernel@...r.kernel.org,
	linux-perf-users@...r.kernel.org, Zide Chen <zide.chen@...el.com>,
	Falcon Thomas <thomas.falcon@...el.com>,
	Dapeng Mi <dapeng1.mi@...el.com>, Xudong Hao <xudong.hao@...el.com>,
	Kan Liang <kan.liang@...ux.intel.com>
Subject: Re: [Patch v6 05/22] perf/x86: Use x86_perf_regs in the x86 nmi
 handler

On Mon, Feb 09, 2026 at 03:20:30PM +0800, Dapeng Mi wrote:
> From: Kan Liang <kan.liang@...ux.intel.com>
> 
> More and more regs will be supported in the overflow, e.g., more vector
> registers, SSP, etc. The generic pt_regs struct cannot store all of
> them. Use a X86 specific x86_perf_regs instead.
> 
> The struct pt_regs *regs is still passed to x86_pmu_handle_irq(). There
> is no functional change for the existing code.
> 
> AMD IBS's NMI handler doesn't utilize the static call
> x86_pmu_handle_irq(). The x86_perf_regs struct doesn't apply to the AMD
> IBS. It can be added separately later when AMD IBS supports more regs.
> 
> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
> Signed-off-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
> ---
>  arch/x86/events/core.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 6df73e8398cd..8c80d22864d8 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -1785,6 +1785,7 @@ EXPORT_SYMBOL_FOR_KVM(perf_put_guest_lvtpc);
>  static int
>  perf_event_nmi_handler(unsigned int cmd, struct pt_regs *regs)
>  {
> +	struct x86_perf_regs x86_regs;
>  	u64 start_clock;

So a few patches ago you pulled this off stack because too large, and
then here you stick it on stack again.

That is a wee bit inconsistent.

Furthermore, I think you can re-purpose that same off-stack copy. After
all, the pebs_drain thing can only happen:

 - from NMI (like here);
 - from context switch, when PMU is disabled (and thus no NMIs).

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