netdev - Re: [PATCH 2/3] x86_64: Define 128-bit memory-mapped I/O operations

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Message-ID: <50350098.6030100@zytor.com>
Date:	Wed, 22 Aug 2012 08:54:00 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Ben Hutchings <bhutchings@...arflare.com>
CC:	David Laight <David.Laight@...LAB.COM>,
	Benjamin LaHaise <bcrl@...ck.org>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	David Miller <davem@...emloft.net>, tglx@...utronix.de,
	mingo@...hat.com, netdev@...r.kernel.org,
	linux-net-drivers@...arflare.com, x86@...nel.org
Subject: Re: [PATCH 2/3] x86_64: Define 128-bit memory-mapped I/O operations

On 08/22/2012 08:51 AM, Ben Hutchings wrote:
>>
>> FWIW can you even guarantee to do an atomic 64bit PCIe transfer
>> on many systems (without resorting to a dma unit).
>
> On any architecture that implements readq and writeq these had better be
> atomic.
>

Sorry, you fail.  There are definitely systems in the field where 
readq() and writeq() are implemented, because the CPU supports them, 
where the fabric does not guarantee they are intact.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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