netdev - RE: [PATCH v5] can: add Renesas R-Car CAN driver

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Message-ID: <063D6719AE5E284EB5DD2968C1650D6D0F6CDC95@AcuExch.aculab.com>
Date:	Fri, 28 Feb 2014 12:17:16 +0000
From:	David Laight <David.Laight@...LAB.COM>
To:	'Sergei Shtylyov' <sergei.shtylyov@...entembedded.com>,
	Marc Kleine-Budde <mkl@...gutronix.de>,
	Geert Uytterhoeven <geert@...ux-m68k.org>
CC:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"wg@...ndegger.com" <wg@...ndegger.com>,
	"linux-can@...r.kernel.org" <linux-can@...r.kernel.org>,
	Linux-sh list <linux-sh@...r.kernel.org>,
	Pavel Kiryukhin <vksavl@...il.com>
Subject: RE: [PATCH v5] can: add Renesas R-Car CAN driver

From: Sergei Shtylyov
>     This is not a 32-bit register but 24- and 8-bit one. I'm afraid we won't
> be able to test on BE soon as the machine we're debugging on is LE only.
> Anyway, for the big-endian configured Superhyway bus the big-endian HPB bus
> the CAN controller resides on shouldn't swap bytes.

Except that you aren't going to get any cpu I know about to do a bus
access with only three of the four byte enables asserted (except as part
of a misaligned 32 bit transfer).

So you either have four 8-bit registers, or one 32-bit one.

I'd suggest keeping both parts in the driver data area and oring
them together before writing to the device.

	David