netdev - Re: [PATCH 0/4 RFCv2] Realtek SMI RTL836x DSA driver

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Message-ID: <CACRpkdbnO4vhGHTodkMkP+Zgrr71jp2pGuyXCg03YzjK1D1NTw@mail.gmail.com>
Date:   Tue, 29 May 2018 10:49:46 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Vivien Didelot <vivien.didelot@...oirfairelinux.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        netdev <netdev@...r.kernel.org>,
        OpenWrt Development List <openwrt-devel@...ts.openwrt.org>,
        LEDE Development List <lede-dev@...ts.infradead.org>
Subject: Re: [PATCH 0/4 RFCv2] Realtek SMI RTL836x DSA driver

On Mon, May 28, 2018 at 8:20 PM, Andrew Lunn <andrew@...n.ch> wrote:
> On Mon, May 28, 2018 at 07:47:48PM +0200, Linus Walleij wrote:
>> This is a second RFC version of the DSA driver for Realtek
>> RTL8366x especially RTL8366RB.
>>
>> I've been beating my head against this one and I'm not really
>> clear on why my ethernet frames are not coming through to the
>> CPU port on the chip.
>>
>> It appears when using ethtool -S on the ports that packets
>> are passing fine into the router fabric and through to the
>> CPU port but the ethernet driver where the fixed link is
>> connected refuse to accept the packages.
>
> Hi Linus
>
> Have you played with RGMII delays?

No not like I changed them or anything... the SoC has some
set-up for skew and delay on the nanosecond level, but I used the
vendor defaults, verified to be the same in their custom
kernel tree.

It's this stuff from the DTS:

+                                       conf0 {
+                                               pins = "V8 GMAC0
RXDV", "T10 GMAC1 RXDV";
+                                               skew-delay = <0>;
+                                       };
+                                       conf1 {
+                                               pins = "Y7 GMAC0 RXC",
"Y11 GMAC1 RXC";
+                                               skew-delay = <15>;
+                                       };
+                                       conf2 {
+                                               pins = "T8 GMAC0
TXEN", "W11 GMAC1 TXEN";
+                                               skew-delay = <7>;
+                                       };
+                                       conf3 {
+                                               pins = "U8 GMAC0 TXC";
+                                               skew-delay = <11>;
+                                       };
+                                       conf4 {
+                                               pins = "V11 GMAC1 TXC";
+                                               skew-delay = <10>;
+                                       };

Yours,
Linus Walleij