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Date:   Tue, 24 Mar 2020 15:53:30 +0100
From:   Marek Vasut <marex@...x.de>
To:     Lukas Wunner <lukas@...ner.de>
Cc:     Andrew Lunn <andrew@...n.ch>, netdev@...r.kernel.org,
        "David S . Miller" <davem@...emloft.net>,
        Petr Stetiar <ynezz@...e.cz>,
        YueHaibing <yuehaibing@...wei.com>
Subject: Re: [PATCH 07/14] net: ks8851: Use 16-bit writes to program MAC
 address

On 3/24/20 3:47 PM, Lukas Wunner wrote:
> On Tue, Mar 24, 2020 at 02:09:18PM +0100, Marek Vasut wrote:
>> I have a feeling this whole thing might be more messed up then we
>> thought. At least the KS8851-16MLL has an "endian mode" bit in the CCR
>> register, the SPI variant does not.
> 
> On the MLL variant of this chip, pin 10 can be pulled up to force it
> into big endian mode, otherwise it's in little-endian mode.  Obviously
> this should be configured by the board designer such that it matches
> the CPU's endianness.

Sadly, that's not the case on the device I have here right now.
So I'm suffering the performance impact of having to endian-swap on
every 16bit access.

> Of course we *could* support inverted endianness in case the hardware
> engineer botched the board layout.  Not sure if we have to.
> 
> In the CCR register that you mention, you can determine whether the
> pin is pulled up or not.  If it is in big-endian mode and you're
> on a little-endian CPU, you're hosed and the only option that you've
> got is to invert endianness in software, i.e. in the accessors.

Yes

> If the pin is pulled to ground or not connected (again, can be
> determined from CCR) then you're able to switch the endianness by
> setting bit 11 in the RXFDPR register.  No need to convert it in
> the accessors in this case.

That's not the setup I have right now, sadly.

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