lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20201207181631.6cade981@kicinski-fedora-pc1c0hjn.DHCP.thefacebook.com>
Date:   Mon, 7 Dec 2020 18:16:31 -0800
From:   Jakub Kicinski <kuba@...nel.org>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Sven Van Asbroeck <thesven73@...il.com>,
        Woojung Huh <woojung.huh@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        David S Miller <davem@...emloft.net>,
        Helmut Grohne <helmut.grohne@...enta.de>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net v1 2/2] net: dsa: microchip: improve port count
 comments

On Tue, 8 Dec 2020 00:31:16 +0100 Andrew Lunn wrote:
> On Sat, Dec 05, 2020 at 10:28:14AM -0500, Sven Van Asbroeck wrote:
> > From: Sven Van Asbroeck <thesven73@...il.com>
> > 
> > Port counts in microchip dsa drivers can be quite confusing:
> > on the ksz8795, ksz_chip_data->port_cnt excludes the cpu port,
> > yet on the ksz9477, it includes the cpu port.
> > 
> > Add comments to document this situation explicitly.  
> 
> Rather than document it, we should make it uniform. Unless there is a
> valid reason to require them to mean different things.

Agreed.

I wonder if we should make this effort target net-next.

My concern is that for the 3 port switch the cpu_ports variable is set
to 0x10, the same as for the 4 port one. Which makes me worried that 
if we just allow the "+ 1" - the CPU port will not actually hit the
register offsets its supposed to on 3 port platforms.

Since configuring the CPU port never worked here (AFAICT) we can view
this as a new feature / config option (even tho an important one).

So let's move to net-next, and we can "do this right".

Does that sound sane?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ