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Message-ID: <20210630182809.GH22278@shell.armlinux.org.uk>
Date: Wed, 30 Jun 2021 19:28:09 +0100
From: "Russell King (Oracle)" <linux@...linux.org.uk>
To: Robert Hancock <robert.hancock@...ian.com>
Cc: "davem@...emloft.net" <davem@...emloft.net>,
"kuba@...nel.org" <kuba@...nel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
"radhey.shyam.pandey@...inx.com" <radhey.shyam.pandey@...inx.com>
Subject: Re: [PATCH net-next] net: axienet: Allow phytool access to PCS/PMA
PHY
On Wed, Jun 30, 2021 at 06:23:46PM +0000, Robert Hancock wrote:
> On Wed, 2021-06-30 at 18:46 +0100, Russell King (Oracle) wrote:
> > On Wed, Jun 30, 2021 at 11:40:22AM -0600, Robert Hancock wrote:
> > > Allow phytool ioctl access to read/write registers in the internal
> > > PCS/PMA PHY if it is enabled.
> >
> > I wonder if this is something that should happen in phylink?
> >
>
> If there are other drivers which have a PCS which could be accessed with
> phytool etc., it might make sense. Right now phylink core doesn't really have
> any knowledge that the PCS PHY actually exists as something that can be
> accessed via MDIO registers, it just talks to it indirectly through the
> mac_config and mac_pcs_get_state callbacks in the driver which then call back
> into the c22_pcs helper functions to actually talk to the PCS.
Phylink does know that a PCS exists. It has separate pcs_ops for it, and
slightly changes its behaviour when a PCS exists.
--
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