[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CACRpkdYaqN8=AcSJMTk_uNfDti_tETQ6LT8=OO74qAHadtRmaA@mail.gmail.com>
Date: Tue, 5 Oct 2021 16:07:00 +0200
From: Linus Walleij <linus.walleij@...aro.org>
To: Alvin Šipraga <ALSI@...g-olufsen.dk>
Cc: Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
Mauri Sandberg <sandberg@...lfence.com>,
DENG Qingfang <dqfext@...il.com>
Subject: Re: [PATCH net-next 1/4 v4] net: dsa: rtl8366rb: Support disabling learning
On Tue, Oct 5, 2021 at 9:59 AM Alvin Šipraga <ALSI@...g-olufsen.dk> wrote:
> On 10/4/21 10:57 PM, Linus Walleij wrote:
> > BTW: all the patches i have left are extensions to RTL8366RB
> > specifically so I think it should be fine for you to submit patches
> > for your switch on top of net-next, maybe we can test this
> > on you chip too, I suspect it works the same on all Realtek
> > switches?
>
> Generally speaking I don't think that the patches you have sent for 66RB
> are particularly relevant for the 65MB because the register layout and
> some chip semantics are totally different.
I was mainly thinking about the crazy VLAN set-up that didn't use
port isolation and which is now deleted. But maybe you were not
using the rtl8366.c file either? Just realtek-smi.c?
> Regarding CPU port learning
> for the RTL8365MB chip: right now I am playing around with the "third
> way" Vladimir suggested, by enabling learning selectively only for
> bridge-layer packets (skb->offload_fwd_mark == true). To begin with I'm
> not even sure if you have this capability with the RTL8366RB.
This will be interesting to see!
Yours,
Linus Walleij
Powered by blists - more mailing lists