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Message-ID: <d5952271-a90f-4794-0087-9781d2258e17@xilinx.com>
Date: Thu, 13 Jan 2022 08:25:22 +0100
From: Michal Simek <michal.simek@...inx.com>
To: Robert Hancock <robert.hancock@...ian.com>,
<netdev@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>
CC: <davem@...emloft.net>, <kuba@...nel.org>, <robh+dt@...nel.org>,
<michal.simek@...inx.com>, <nicolas.ferre@...rochip.com>,
<claudiu.beznea@...rochip.com>, <devicetree@...r.kernel.org>
Subject: Re: [PATCH net-next 1/3] macb: bindings doc: added generic PHY and
reset mappings for ZynqMP
On 1/12/22 19:11, Robert Hancock wrote:
> Updated macb DT binding documentation to reflect the phy-names, phys,
> resets, reset-names properties which are now used with ZynqMP GEM
> devices, and added a ZynqMP-specific DT example.
>
> Signed-off-by: Robert Hancock <robert.hancock@...ian.com>
> ---
> .../devicetree/bindings/net/macb.txt | 33 +++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt
> index a1b06fd1962e..e526952145b8 100644
> --- a/Documentation/devicetree/bindings/net/macb.txt
> +++ b/Documentation/devicetree/bindings/net/macb.txt
> @@ -29,6 +29,12 @@ Required properties:
> Optional elements: 'rx_clk' applies to cdns,zynqmp-gem
> Optional elements: 'tsu_clk'
> - clocks: Phandles to input clocks.
> +- phy_names, phys: Required with ZynqMP SoC when in SGMII mode.
> + phy_names should be "sgmii-phy" and phys should
> + reference PS-GTR generic PHY device for this controller
> + instance. See ZynqMP example below.
> +- resets, reset-names: Recommended with ZynqMP, specify reset control for this
> + controller instance with zynqmp-reset driver.
>
> Optional properties:
> - mdio: node containing PHY children. If this node is not present, then PHYs
> @@ -58,3 +64,30 @@ Examples:
> reset-gpios = <&pioE 6 1>;
> };
> };
> +
> + gem1: ethernet@...c0000 {
> + compatible = "cdns,zynqmp-gem", "cdns,gem";
> + interrupt-parent = <&gic>;
> + interrupts = <0 59 4>, <0 59 4>;
> + reg = <0x0 0xff0c0000 0x0 0x1000>;
> + clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
> + <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
> + <&zynqmp_clk GEM_TSU>;
> + clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #stream-id-cells = <1>;
> + iommus = <&smmu 0x875>;
> + power-domains = <&zynqmp_firmware PD_ETH_1>;
> + resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
> + reset-names = "gem1_rst";
> + status = "okay";
> + phy-mode = "sgmii";
> + phy-names = "sgmii-phy";
> + phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + pause;
> + };
> + };
Geert already converted this file to yaml that's why you should target this version.
Thanks,
Michal
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