netdev - Re: [PATCH 9/9] dt-bindings: net: ipq4019-mdio: Document ipq5332 platform

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Message-ID: <2d4818f6-3935-4621-bf96-d84747cbefa3@quicinc.com>
Date: Mon, 20 Nov 2023 17:00:13 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, <agross@...nel.org>,
        <andersson@...nel.org>, <konrad.dybcio@...aro.org>,
        <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
        <pabeni@...hat.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
        <hkallweit1@...il.com>, <linux@...linux.org.uk>,
        <robert.marko@...tura.hr>, <linux-arm-msm@...r.kernel.org>,
        <netdev@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <quic_srichara@...cinc.com>
Subject: Re: [PATCH 9/9] dt-bindings: net: ipq4019-mdio: Document ipq5332
 platform



On 11/18/2023 11:36 PM, Andrew Lunn wrote:
>> The clock arguments are provided in the later part as below. i will also
>> provide more detail clock names for the new added clocks for the ipq5332
>> platform in description.
>>
>>    - if:
>>
>>        properties:
>>
>>          compatible:
>>
>>            contains:
>>
>>              enum:
>>
>>                - qcom,ipq5332-mdio
>>
>>      then:
>>
>>        properties:
>>
>>          clocks:
>>
>>            items:
>>
>>              - description: MDIO clock source frequency fixed to 100MHZ
>>
>>              - description: UNIPHY0 AHB clock source frequency fixed to
>> 100MHZ
>>              - description: UNIPHY0 SYS clock source frequency fixed to 24MHZ
>>              - description: UNIPHY1 AHB clock source frequency fixed to
>> 100MHZ
>>              - description: UNIPHY1 SYS clock source frequency fixed to 24MHZ
> 
> As i said before, the frequency of the clocks does not matter
> here. That appears to be the drivers problem. I assume every board
> design, with any sort of PHY, needs the same clock configuration?
> 
>        Andrew

Yes, Andrew, no matter what kind of PHY is connected, these clocks are
fix clocks, the clock rates are same as mentioned above, which are the 
SOC clock configurations.