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Message-ID: <9c2806c7-daaa-4a2d-b69b-245d202d9870@lunn.ch>
Date: Wed, 22 Nov 2023 04:39:20 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Yanteng Si <siyanteng@...ngson.cn>
Cc: hkallweit1@...il.com, peppe.cavallaro@...com,
alexandre.torgue@...s.st.com, joabreu@...opsys.com,
fancer.lancer@...il.com, Jose.Abreu@...opsys.com,
chenhuacai@...ngson.cn, linux@...linux.org.uk, dongbiao@...ngson.cn,
guyinggang@...ngson.cn, netdev@...r.kernel.org,
loongarch@...ts.linux.dev, chris.chenfeiyang@...il.com
Subject: Re: [PATCH v5 3/9] net: stmmac: Add Loongson DWGMAC definitions
On Tue, Nov 21, 2023 at 05:55:24PM +0800, Yanteng Si wrote:
> Hi Andrew,
>
> 在 2023/11/12 04:07, Andrew Lunn 写道:
> > > +#ifdef CONFIG_DWMAC_LOONGSON
> > > +#define DMA_INTR_ABNORMAL (DMA_INTR_ENA_AIE_LOONGSON | DMA_INTR_ENA_AIE | \
> > > + DMA_INTR_ENA_FBE | DMA_INTR_ENA_UNE)
> > > +#else
> > > #define DMA_INTR_ABNORMAL (DMA_INTR_ENA_AIE | DMA_INTR_ENA_FBE | \
> > > DMA_INTR_ENA_UNE)
> > > +#endif
> > The aim is to produce one kernel which runs on all possible
> > variants. So we don't like to see this sort of #ifdef. Please try to
> > remove them.
>
> We now run into a tricky problem: we only have a few register
> definitions(DMA_XXX_LOONGSON)
>
> that are not the same as the dwmac1000 register definition.
What does DMA_INTR_ENA_AIE_LOONGSON do? This seems like an interrupt
mask, and this is enabling an interrupt source? However, i don't see
this bit being tested in any interrupt status register? Or is it
hiding in one of the other patches?
This is where lots of small patches, with good descriptions helps.
Andrew
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