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Message-ID: <MW4PR11MB588900EDB6B3F934A1BCE7FE8E242@MW4PR11MB5889.namprd11.prod.outlook.com>
Date: Fri, 15 Nov 2024 16:34:29 +0000
From: "Olech, Milena" <milena.olech@...el.com>
To: Willem de Bruijn <willemdebruijn.kernel@...il.com>, Vadim Fedorenko
<vadim.fedorenko@...ux.dev>, "intel-wired-lan@...ts.osuosl.org"
<intel-wired-lan@...ts.osuosl.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Nguyen, Anthony L"
<anthony.l.nguyen@...el.com>, "Kitszel, Przemyslaw"
<przemyslaw.kitszel@...el.com>, "Lobakin, Aleksander"
<aleksander.lobakin@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH iwl-net 04/10] idpf: negotiate PTP
capabilies and get PTP clock
On 11/14/2024 9:57 PM, Willem de Bruijn wrote:
> Vadim Fedorenko wrote:
>
> > > +/**
> > > + * idpf_ptp_read_src_clk_reg_direct - Read directly the main timer value
> > > + * @adapter: Driver specific private structure
> > > + * @sts: Optional parameter for holding a pair of system timestamps from
> > > + * the system clock. Will be ignored when NULL is given.
> > > + *
> > > + * Return: the device clock time on success, -errno otherwise.
> > > + */
> > > +static u64 idpf_ptp_read_src_clk_reg_direct(struct idpf_adapter *adapter,
> > > + struct ptp_system_timestamp *sts)
> > > +{
> > > + struct idpf_ptp *ptp = adapter->ptp;
> > > + u32 hi, lo;
> > > +
> > > + /* Read the system timestamp pre PHC read */
> > > + ptp_read_system_prets(sts);
> > > +
> > > + idpf_ptp_enable_shtime(adapter);
> > > + lo = readl(ptp->dev_clk_regs.dev_clk_ns_l);
> > > +
> > > + /* Read the system timestamp post PHC read */
> > > + ptp_read_system_postts(sts);
> > > +
> > > + hi = readl(ptp->dev_clk_regs.dev_clk_ns_h);
> > > +
> > > + return ((u64)hi << 32) | lo;
> > > +}
> >
> > Am I right that idpf_ptp_enable_shtime() "freezes" the time in clk
> > registers and you can be sure that no changes will happen while you are
> > doing 2 transactions? If yes, then what does unfreeze it? Or does it
> > just copy new values to the registers and they will stay until the next
> > command?
>
> Yep, these are shadow registers.
>
> I guess they remain until overwritten on the next latch.
Right, these are shadow registers and the idea is to latch these values
exactly at the same time. As Willem mentioned, they remain until the next
command exec is performed.
Thanks,
Milena
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