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Message-ID: <b93a3655-0bfb-417a-9ee9-2308eb8e8d69@intel.com>
Date: Thu, 28 Aug 2025 14:36:23 -0700
From: Jacob Keller <jacob.e.keller@...el.com>
To: ALOK TIWARI <alok.a.tiwari@...cle.com>, Simon Horman <horms@...nel.org>
CC: <andrew+netdev@...n.ch>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <netdev@...r.kernel.org>
Subject: Re: [External] : Re: [PATCH net] xirc2ps_cs: fix register access when
 enabling FullDuplex



On 8/28/2025 11:49 AM, ALOK TIWARI wrote:
> 
> 
> On 8/28/2025 10:51 PM, Simon Horman wrote:
>> Interesting.
>>
>> It seems that XIRCREG1_ECR is 14, and FullDuplex is 0x4.
>> And 14 | 0x4 = 14. So the right register is read. But
>> clearly the bit isn't set as intended when the register is written
>> (unless, somehow it's already set in the value read from the register).
>>
>> So I guess this never worked as intended.
>> But I guess so long as the code exists it should
>> do what it intended to do.
>>
>> Reviewed-by: Simon Horman<horms@...nel.org>
> 
> Thanks, Simon. your analysis is spot on.
> It seems this never worked as intended.
> 
> Thanks for the review.
> 
> Thanks
> Alok
> 

That analysis also explains why there haven't been complaints about any
issues with invalid access to HW registers, since the address read is
"correct".

Reviewed-by: Jacob Keller <jacob.e.keller@...el.com>


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