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Message-ID: <b296f05c-5cfb-49a8-8eec-09561f8f9368@broadcom.com>
Date: Tue, 23 Sep 2025 08:55:00 -0700
From: Florian Fainelli <florian.fainelli@...adcom.com>
To: Andrew Lunn <andrew@...n.ch>, Kamil Horák - 2N
 <kamilh@...s.com>
Cc: bcm-kernel-feedback-list@...adcom.com, hkallweit1@...il.com,
 linux@...linux.org.uk, davem@...emloft.net, edumazet@...gle.com,
 kuba@...nel.org, pabeni@...hat.com, netdev@...r.kernel.org
Subject: Re: [PATCH] net: phy: bcm5481x: Fix GMII/MII/MII-Lite selection



On 9/23/2025 8:11 AM, Andrew Lunn wrote:
> On Tue, Sep 23, 2025 at 04:34:53PM +0200, Kamil Horák - 2N wrote:
>> The Broadcom bcm54811 is hardware-strapped to select among RGMII and
>> MII/MII-Lite modes. However, the corresponding bit, RGMII Enable in
>> Miscellaneous Control Register must be also set to select desired RGMII
>> or MII(-lite)/GMII mode.
>>
>> Signed-off-by: Kamil Horák - 2N <kamilh@...s.com>
>> ---
>>   drivers/net/phy/broadcom.c | 10 ++++++++++
>>   include/linux/brcmphy.h    |  1 +
>>   2 files changed, 11 insertions(+)
>>
>> diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
>> index a60e58ef90c4..492fbf506d49 100644
>> --- a/drivers/net/phy/broadcom.c
>> +++ b/drivers/net/phy/broadcom.c
>> @@ -436,6 +436,16 @@ static int bcm54811_config_init(struct phy_device *phydev)
>>   	if (err < 0)
>>   		return err;
>>   
>> +	if (!phy_interface_is_rgmii(phydev)) {
>> +		/* Misc Control: GMII/MII/MII-Lite Mode (not RGMII) */
>> +		err = bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC,
>> +					   MII_BCM54XX_AUXCTL_MISC_WREN |
>> +					   MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN |
> 
> This is a bit confusing. If it is NOT RGMII, you set RGMII_SKEW_EN? I
> could understand the opposite, clear the bit...

Bit 7 is documented as RGMII Enable, bits 6:5 are documented as write as 
0b11, ignore on read. Kamil please use 
MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN here which is more true to the 
intended behavior.

> 
>> +					   MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RSVD);
> 
>>   #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC			0x07
>>   #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN	0x0010
>> +#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RSVD		0x0060
> 
> Does RSVD mean reserved? Are you saying these two reserved bits need
> to be set? They must be more than reserved if they need setting.
> 
> 	Andrew

-- 
Florian


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