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Message-ID: <4FA938AE.9070209@zytor.com>
Date:	Tue, 08 May 2012 08:15:58 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Alex Shi <alex.shi@...el.com>
CC:	mgorman@...e.de, npiggin@...il.com, tglx@...utronix.de,
	mingo@...hat.com, arnd@...db.de, rostedt@...dmis.org,
	fweisbec@...il.com, jeremy@...p.org, gregkh@...uxfoundation.org,
	glommer@...hat.com, riel@...hat.com, luto@....edu, avi@...hat.com,
	len.brown@...el.com, dhowells@...hat.com, fenghua.yu@...el.com,
	borislav.petkov@....com, yinghai@...nel.org, ak@...ux.intel.com,
	cpw@....com, steiner@....com, akpm@...ux-foundation.org,
	penberg@...nel.org, hughd@...gle.com, rientjes@...gle.com,
	kosaki.motohiro@...fujitsu.com, n-horiguchi@...jp.nec.com,
	paul.gortmaker@...driver.com, trenn@...e.de, tj@...nel.org,
	oleg@...hat.com, axboe@...nel.dk, a.p.zijlstra@...llo.nl,
	kamezawa.hiroyu@...fujitsu.com, viro@...iv.linux.org.uk,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/7] x86/tlb: add tlb flush all factor for specific
 CPUs

On 05/08/2012 07:03 AM, Alex Shi wrote:
> 
> like some machine in my hands, balance points is 16 entries on Romely-EP;
> while it is at 8 entries on Bloomfield NHM-EP; but on model 15 core2 Xeon
> using invlpg has nothing help.
> 
> For untested machine, no optimization now.
> 

This seems a bit concerning from a forward compatibility point of view.
 It would make more sense to assume that future processors would behave
more like the most recent (Sandy Bridge in your case) unless there is
evidence to the contrary.

>  
> -			if ((end - start)/PAGE_SIZE > act_entries/FLUSHALL_BAR)
> +			if ((end - start)/PAGE_SIZE >
> +					act_entries/tlb_flushall_factor)
>  				local_flush_tlb();

You are doing a dynamic division (and on unknown/older CPUs you're
dividing by zero!!) but all your divisors are powers of two.  Make it a
shift instead.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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