linux-kernel - [PATCH v4 2/2] x86/kvm: Expose TSX Suspend Load Tracking feature

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Message-Id: <1598316478-23337-3-git-send-email-cathy.zhang@intel.com>
Date:   Tue, 25 Aug 2020 08:47:58 +0800
From:   Cathy Zhang <cathy.zhang@...el.com>
To:     kvm@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org
Cc:     pbonzini@...hat.com, sean.j.christopherson@...el.com,
        gregkh@...uxfoundation.org, tglx@...utronix.de,
        tony.luck@...el.com, dave.hansen@...el.com,
        kyung.min.park@...el.com, ricardo.neri-calderon@...ux.intel.com,
        vkuznets@...hat.com, wanpengli@...cent.com, jmattson@...gle.com,
        joro@...tes.org, mingo@...hat.com, bp@...en8.de, hpa@...or.com,
        jpoimboe@...hat.com, ak@...ux.intel.com, ravi.v.shankar@...el.com,
        Cathy Zhang <cathy.zhang@...el.com>
Subject: [PATCH v4 2/2] x86/kvm: Expose TSX Suspend Load Tracking feature

TSX suspend load tracking instruction is supported by
Intel processor, Sapphire Rapids. It aims to give a
way to choose which memory accesses do not need to be
tracked in the TSX read set. It's availability is indicated
as CPUID.(EAX=7,ECX=0):EDX[bit 16].

Expose TSX Suspend Load Address Tracking feature in KVM
CPUID, so KVM could pass this information to guests and
they can make use of this feature accordingly.

Signed-off-by: Cathy Zhang <cathy.zhang@...el.com>
Reviewed-by: Tony Luck <tony.luck@...el.com>
---
Changes since v3:
 * Remove SERIALIZE part and refactor commit message..

Changes since v2:
 * Merge two patches into a single one. (Luck, Tony)
 * Add overview introduction for features. (Sean Christopherson)
 * Refactor commit message to explain why expose feature bits. (Luck, Tony)
---
 arch/x86/kvm/cpuid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 3fd6eec..7456f9a 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -371,7 +371,7 @@ void kvm_set_cpu_caps(void)
 		F(AVX512_4VNNIW) | F(AVX512_4FMAPS) | F(SPEC_CTRL) |
 		F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) |
 		F(MD_CLEAR) | F(AVX512_VP2INTERSECT) | F(FSRM) |
-		F(SERIALIZE)
+		F(SERIALIZE) | F(TSXLDTRK)
 	);
 
 	/* TSC_ADJUST and ARCH_CAPABILITIES are emulated in software. */
-- 
1.8.3.1