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Message-ID: <ZNMozPV2yU1G9+1z@sunil-laptop>
Date: Wed, 9 Aug 2023 11:19:00 +0530
From: Sunil V L <sunilvl@...tanamicro.com>
To: Conor Dooley <conor@...nel.org>
Cc: linux-doc@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-acpi@...r.kernel.org, linux-pci@...r.kernel.org,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Atish Kumar Patra <atishp@...osinc.com>,
Conor Dooley <conor.dooley@...rochip.com>,
Will Deacon <will@...nel.org>, Haibo Xu <haibo1.xu@...el.com>,
Jonathan Corbet <corbet@....net>,
Marc Zyngier <maz@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Robert Moore <robert.moore@...el.com>,
Andrew Jones <ajones@...tanamicro.com>,
Albert Ou <aou@...s.berkeley.edu>,
Paul Walmsley <paul.walmsley@...ive.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Thomas Gleixner <tglx@...utronix.de>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Daniel Scally <djrscally@...il.com>,
Palmer Dabbelt <palmer@...belt.com>,
Sakari Ailus <sakari.ailus@...ux.intel.com>,
Anup Patel <anup@...infault.org>, Len Brown <lenb@...nel.org>
Subject: Re: [RFC PATCH v1 12/21] irqchip/riscv-intc: Use swnode framework to
create fwnode
On Tue, Aug 08, 2023 at 09:31:49AM +0100, Conor Dooley wrote:
> Hey Sunil,
>
> On Thu, Aug 03, 2023 at 11:29:07PM +0530, Sunil V L wrote:
> > By using swnode framework, all data from ACPI tables can
> > be populated as properties of the swnode. This simplifies
> > the driver code and removes the need for ACPI vs DT checks.
> > Use this framework for RISC-V INTC driver.
>
> btw, you are permitted to use more than 60 characters in a commit
> message...
>
Sure.
> >
> > Signed-off-by: Sunil V L <sunilvl@...tanamicro.com>
> > ---
> > Documentation/riscv/acpi.rst | 21 +++++++++++++++
> > arch/riscv/include/asm/acpi.h | 1 +
> > drivers/acpi/riscv/Makefile | 2 +-
> > drivers/acpi/riscv/irqchip.c | 46 ++++++++++++++++++++++++++++++++
> > drivers/irqchip/irq-riscv-intc.c | 12 ++++-----
> > 5 files changed, 75 insertions(+), 7 deletions(-)
> > create mode 100644 drivers/acpi/riscv/irqchip.c
> >
> > diff --git a/Documentation/riscv/acpi.rst b/Documentation/riscv/acpi.rst
> > index 9870a282815b..e2406546bc16 100644
> > --- a/Documentation/riscv/acpi.rst
> > +++ b/Documentation/riscv/acpi.rst
> > @@ -8,3 +8,24 @@ The ISA string parsing rules for ACPI are defined by `Version ASCIIDOC
> > Conversion, 12/2022 of the RISC-V specifications, as defined by tag
> > "riscv-isa-release-1239329-2023-05-23" (commit 1239329
> > ) <https://github.com/riscv/riscv-isa-manual/releases/tag/riscv-isa-release-1239329-2023-05-23>`_
> > +
> > +Interrupt Controller Drivers
> > +=======
> > +
> > +ACPI drivers for RISC-V interrupt controllers use software node framework to
> > +create the fwnode for the interrupt controllers. Below properties are
> > +additionally required for some firmware nodes apart from the properties
> > +defined by the device tree bindings for these interrupt controllers. The
> > +properties are created using the data in MADT table.
>
> I don't really understand this text, specifically what you are getting
> at w/ the dependency on devicetree properties. What exactly does "apart
> from the properties defined by the devicetree bindings" mean?
>
> Is there prior art for this kind of "ACPI needs swnodes that look
> vaguely similar to devicetree" for other interrupt controllers?
>
Never mind. This will not be required with Marc's feedback.
Thanks,
Sunil
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