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Message-ID: <CAA8EJppyd5-TQmvzRB3rBhRQtMLdu=6u5aQd5rWHitRuaJXzpA@mail.gmail.com>
Date: Thu, 14 Dec 2023 09:15:45 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Praveenkumar I <quic_ipkumar@...cinc.com>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
bhelgaas@...gle.com, lpieralisi@...nel.org, kw@...ux.com,
vkoul@...nel.org, kishon@...nel.org, mani@...nel.org,
quic_nsekar@...cinc.com, quic_srichara@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
quic_varada@...cinc.com, quic_devipriy@...cinc.com,
quic_kathirav@...cinc.com, quic_anusha@...cinc.com
Subject: Re: [PATCH 07/10] dt-bindings: PCI: qcom: Add IPQ5332 SoC
On Thu, 14 Dec 2023 at 08:30, Praveenkumar I <quic_ipkumar@...cinc.com> wrote:
>
> Add support for the PCIe controller on the Qualcomm
> IPQ5332 SoC to the bindings.
>
> Signed-off-by: Praveenkumar I <quic_ipkumar@...cinc.com>
> ---
> .../devicetree/bindings/pci/qcom,pcie.yaml | 36 +++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index eadba38171e1..af5e67d2a984 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -21,6 +21,7 @@ properties:
> - qcom,pcie-apq8064
> - qcom,pcie-apq8084
> - qcom,pcie-ipq4019
> + - qcom,pcie-ipq5332
> - qcom,pcie-ipq6018
> - qcom,pcie-ipq8064
> - qcom,pcie-ipq8064-v2
> @@ -170,6 +171,7 @@ allOf:
> compatible:
> contains:
> enum:
> + - qcom,pcie-ipq5332
> - qcom,pcie-ipq6018
> - qcom,pcie-ipq8074-gen3
> then:
> @@ -332,6 +334,39 @@ allOf:
> - const: ahb # AHB reset
> - const: phy_ahb # PHY AHB reset
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,pcie-ipq5332
As you seem to be depending on the ipq9574, could you please reuse the
DT entry too?
> + then:
> + properties:
> + clocks:
> + minItems: 6
> + maxItems: 6
> + clock-names:
> + items:
> + - const: ahb # AHB clock
> + - const: aux # Auxiliary clock
> + - const: axi_m # AXI Master clock
> + - const: axi_s # AXI Slave clock
> + - const: axi_bridge # AXI bridge clock
> + - const: rchng
> + resets:
> + minItems: 8
> + maxItems: 8
> + reset-names:
> + items:
> + - const: pipe # PIPE reset
> + - const: sticky # Core sticky reset
> + - const: axi_m_sticky # AXI master sticky reset
> + - const: axi_m # AXI master reset
> + - const: axi_s_sticky # AXI slave sticky reset
> + - const: axi_s # AXI slave reset
> + - const: ahb # AHB reset
> + - const: aux # AUX reset
> +
> - if:
> properties:
> compatible:
> @@ -790,6 +825,7 @@ allOf:
> enum:
> - qcom,pcie-apq8064
> - qcom,pcie-ipq4019
> + - qcom,pcie-ipq5332
> - qcom,pcie-ipq8064
> - qcom,pcie-ipq8064v2
> - qcom,pcie-ipq8074
> --
> 2.34.1
>
>
--
With best wishes
Dmitry
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