linux-kernel - Re: [PATCH 2/6] dt-bindings: iommu: mediatek: Fix interrupt count constraint for new SoCs

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Message-ID: <aca569b8-6867-ae9f-0746-021696b801fe@mediatek.com>
Date: Wed, 25 Sep 2024 14:18:12 +0800
From: Macpaul Lin <macpaul.lin@...iatek.com>
To: Conor Dooley <conor@...nel.org>, <friday.yang@...iatek.com>, Yong Wu
	<yong.wu@...iatek.com>
CC: Chun-Kuang Hu <chunkuang.hu@...nel.org>, Philipp Zabel
	<p.zabel@...gutronix.de>, Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
	Simona Vetter <simona@...ll.ch>, Rob Herring <robh@...nel.org>, "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Yong Wu
	<yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>, Will Deacon
	<will@...nel.org>, Robin Murphy <robin.murphy@....com>, Matthias Brugger
	<matthias.bgg@...il.com>, AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>, <dri-devel@...ts.freedesktop.org>,
	<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <iommu@...ts.linux.dev>,
	<linux-arm-kernel@...ts.infradead.org>, Alexandre Mergnat
	<amergnat@...libre.com>, Bear Wang <bear.wang@...iatek.com>, Pablo Sun
	<pablo.sun@...iatek.com>, Macpaul Lin <macpaul@...il.com>, Sen Chu
	<sen.chu@...iatek.com>, Chris-qj chen <chris-qj.chen@...iatek.com>, "MediaTek
 Chromebook Upstream" <Project_Global_Chrome_Upstream_Group@...iatek.com>,
	Chen-Yu Tsai <wenst@...omium.org>
Subject: Re: [PATCH 2/6] dt-bindings: iommu: mediatek: Fix interrupt count
 constraint for new SoCs


On 9/25/24 00:02, Conor Dooley wrote:
> On Tue, Sep 24, 2024 at 06:31:52PM +0800, Macpaul Lin wrote:
>> The infra-iommu node in mt8195.dtsi was triggering a CHECK_DTBS error due
>> to an excessively long 'interrupts' property. The error message was:
>>
>>    infra-iommu@...15000: interrupts: [[0, 795, 4, 0], [0, 796, 4, 0],
>>                       [0, 797, 4, 0], [0, 798, 4, 0], [0, 799, 4, 0]]
>>                       is too long
>>
>> To address this issue, add "minItems: 1" and "maxItems: 5" constraints to
>> the 'interrupts' property in the DT binding schema. This change allows for
>> flexibility in the number of interrupts for new SoCs
>>
>> Fixes: bca28426805d ("dt-bindings: iommu: mediatek: Convert IOMMU to DT schema")
>>
> 
> This space should be removed.

Thanks! Will fix it in the next version.

>> Signed-off-by: Macpaul Lin <macpaul.lin@...iatek.com>
>> ---
>>   Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> index ea6b0f5f24de..a00f1f0045b1 100644
>> --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml
>> @@ -96,7 +96,8 @@ properties:
>>       maxItems: 1
>>   
>>     interrupts:
>> -    maxItems: 1
>> +    minItems: 1
>> +    maxItems: 5
> 
> You need to add an items list here, and probably some per compatible
> constraints. What are each of the itnerrupts for?
> 

According to Friday Yang's comment,
The IOMMU of MT8195 has 5 banks: 0/1/2/3/4. Each bank has a set of APB 
registers
corresponding to the normal world, protected world 1/2/3,
and secure world, respectively.
Therefore, 5 interrupt numbers are needed.

>>   
>>     clocks:
>>       items:
>> -- 
>> 2.45.2
>>

Will try to fix it and add some description for MT8195.
I think this patch could be split as a separated patch from the origin
patch set. It'll take some time to refine the patch.

Thanks
Macpaul Lin