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Message-ID: <45f562afc56223014bde8defc132023b.sboyd@kernel.org>
Date: Thu, 17 Oct 2024 15:25:00 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, Conor Dooley <conor+dt@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>, Michael Turquette <mturquette@...libre.com>, Pablo Sun <pablo.sun@...iatek.com>, Rob Herring <robh@...nel.org>, Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org, Pablo Sun <pablo.sun@...iatek.com>
Subject: Re: [PATCH v2 2/6] clk: mediatek: clk-mt8188-topckgen: Remove univpll from parents of mfg_core_tmp
Quoting Pablo Sun (2024-09-27 03:30:01)
> Same as MT8195, MT8188 GPU clock is primarly supplied by the dedicated
> mfgpll. The clock "mfg_core_tmp" is only used as an alt clock when
> setting mfgpll clock rate.
>
> If we keep the univpll parents from mfg_core_tmp, when setting
> GPU frequency to 390000000, the common clock framework would switch
> the parent to univpll, instead of setting mfgpll to 390000000:
>
> mfgpll 0 0 0 949999756
> univpll 2 2 0 2340000000
> univpll_d6 1 1 0 390000000
> top_mfg_core_tmp 1 1 0 390000000
> mfg_ck_fast_ref 1 1 0 390000000
> mfgcfg_bg3d 1 1 0 390000000
>
> This results in failures when subsequent devfreq operations need to
> switch to other frequencies. So remove univpll from the parent list.
>
> This solution is taken from commit 72d38ed720e9 ("clk: mediatek:
> clk-mt8195-topckgen: Drop univplls from mfg mux parents")
>
> Signed-off-by: Pablo Sun <pablo.sun@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---
Applied to clk-next
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