linux-kernel - Re: [PATCH v2 09/10] arm64: dts: imx8mq: Add i.MX8M OCOTP disable fuse definitions

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Message-ID: <Z6YlxhckC7H32GU6@lizhi-Precision-Tower-5810>
Date: Fri, 7 Feb 2025 10:24:54 -0500
From: Frank Li <Frank.li@....com>
To: Alexander Stein <alexander.stein@...tq-group.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
	devicetree@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 09/10] arm64: dts: imx8mq: Add i.MX8M OCOTP disable
 fuse definitions

On Fri, Feb 07, 2025 at 09:36:14AM +0100, Alexander Stein wrote:
> These definitions define the location of corresponding disable bits
> in OCOTP peripheral.
>
> Signed-off-by: Alexander Stein <alexander.stein@...tq-group.com>
> ---

Reviewed-by: Frank Li <Frank.Li@....com>

>  arch/arm64/boot/dts/freescale/imx8mq-ocotp.h | 37 ++++++++++++++++++++
>  1 file changed, 37 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-ocotp.h
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-ocotp.h b/arch/arm64/boot/dts/freescale/imx8mq-ocotp.h
> new file mode 100644
> index 0000000000000..d991d57816264
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-ocotp.h
> @@ -0,0 +1,37 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
> +/*
> + * Copyright (c) 2025 TQ-Systems GmbH <linux@...tq-group.com>,
> + * D-82229 Seefeld, Germany.
> + * Author: Alexander Stein
> + */
> +
> +#ifndef __DTS_IMX8MQ_OCOTP_H
> +#define __DTS_IMX8MQ_OCOTP_H
> +
> +/*
> + * The OCOTP is a tuple of
> + * <fuse_addr fuse_bit_offset>
> + */
> +
> +#define IMX8MQ_OCOTP_M4_DISABLE		20 8
> +#define IMX8MQ_OCOTP_M4_MPU_DISABLE	20 9
> +#define IMX8MQ_OCOTP_M4_FPU_DISABLE	20 10
> +#define IMX8MQ_OCOTP_USB_OTG1_DISABLE	20 11
> +#define IMX8MQ_OCOTP_USB_OTG2_DISABLE	20 12
> +#define IMX8MQ_OCOTP_DOLBY_DISABLE	20 13
> +#define IMX8MQ_OCOTP_VP9_DISABLE	20 18
> +#define IMX8MQ_OCOTP_HEVC_DISABLE	20 19
> +#define IMX8MQ_OCOTP_AVC_DISABLE	20 20
> +#define IMX8MQ_OCOTP_VPU_DISABLE	20 21
> +#define IMX8MQ_OCOTP_PCIE1_DISABLE	20 22
> +#define IMX8MQ_OCOTP_PCIE2_DISABLE	20 23
> +#define IMX8MQ_OCOTP_GPU_DISABLE	20 24
> +#define IMX8MQ_OCOTP_HDMI_DISABLE	20 25
> +#define IMX8MQ_OCOTP_DC_DISABLE		20 26
> +#define IMX8MQ_OCOTP_HDCP_DISABLE	20 27
> +#define IMX8MQ_OCOTP_MIPI_DSI_DISABLE	20 28
> +#define IMX8MQ_OCOTP_ENET_DISABLE	20 29
> +#define IMX8MQ_OCOTP_MIPI_CSI1_DISABLE	20 30
> +#define IMX8MQ_OCOTP_MIPI_CSI2_DISABLE	20 31
> +
> +#endif /* __DTS_IMX8MQ_OCOTP_H */
> --
> 2.34.1
>