linux-kernel - Re: [PATCH v7 1/4] dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controller

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Message-ID: <642f8456-982f-4cb3-9cd1-8b18232387b2@kernel.org>
Date: Tue, 12 Aug 2025 00:11:21 +0300
From: Georgi Djakov <djakov@...nel.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>, andersson@...nel.org,
 mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, konradybcio@...nel.org,
 rafael@...nel.org, viresh.kumar@...aro.org, ilia.lin@...nel.org,
 linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-pm@...r.kernel.org
Cc: Sricharan Ramabadhran <quic_srichara@...cinc.com>,
 Md Sadre Alam <quic_mdalam@...cinc.com>,
 Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v7 1/4] dt-bindings: clock: ipq5424-apss-clk: Add ipq5424
 apss clock controller

On 8/11/25 12:09 PM, Varadarajan Narayanan wrote:
> From: Sricharan Ramabadhran <quic_srichara@...cinc.com>
> 
> The CPU core in ipq5424 is clocked by a huayra PLL with RCG support.
> The RCG and PLL have a separate register space from the GCC.
> Also the L3 cache has a separate pll and needs to be scaled along
> with the CPU.
> 
> Co-developed-by: Md Sadre Alam <quic_mdalam@...cinc.com>
> Signed-off-by: Md Sadre Alam <quic_mdalam@...cinc.com>
> Signed-off-by: Sricharan Ramabadhran <quic_srichara@...cinc.com>
> [ Added interconnect related changes ]
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
> Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
> ---
> v7: Fix 'Reviewed-by' placement
> 
> v6: Add 'Reviewed-by: Krzysztof Kozlowski'
>      Drop 'clock-names'
> 
> v5: Remove previous maintainers
>      Change clock@...0000 to clock-controller@...0000 in example
>      Have one item per line for clocks and clock-names in example
> 
> v4: Add self to 'maintainers'
>      s/gpll0/clk_ref/ in clock-names
>      s/apss-clock/clock/ in example's node name
> 
> v2: Add #interconnect-cells to help enable L3 pll as ICC clock
>      Add master/slave ids
> ---
>   .../bindings/clock/qcom,ipq5424-apss-clk.yaml | 55 +++++++++++++++++++
>   include/dt-bindings/clock/qcom,apss-ipq.h     |  6 ++
>   .../dt-bindings/interconnect/qcom,ipq5424.h   |  3 +

Acked-by: Georgi Djakov <djakov@...nel.org>