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Message-ID: <024f01dc27cb$f167d370$d4377a50$@samsung.com>
Date: Wed, 17 Sep 2025 17:39:35 +0530
From: "Inbaraj E" <inbaraj.e@...sung.com>
To: "'Rob Herring'" <robh@...nel.org>
Cc: <rmfrfs@...il.com>, <laurent.pinchart@...asonboard.com>,
<martink@...teo.de>, <kernel@...i.sm>, <mchehab@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <shawnguo@...nel.org>,
<s.hauer@...gutronix.de>, <kernel@...gutronix.de>, <festevam@...il.com>,
<linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
<imx@...ts.linux.dev>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>,
<pankaj.dubey@...sung.com>, <ravi.patel@...sung.com>,
<shradha.t@...sung.com>
Subject: RE: [PATCH v3 1/7] dt-bindings: media: nxp: Add support for FSD SoC
Hi Rob,
Thanks for the review
> > + description:
> > + Syscon used to hold and release the reset of MIPI D-PHY
>
> Reset? Sounds like you should be using the reset binding.
The Tesla FSD Soc does not have a dedicated reset controller. Instead, we
are using the
system controller which is MMIO Space handled by syscon driver, to assert or
de-assert the D-PHY
reset. So, I prefer to use syscon.
>
> > +
> > phy-supply:
> > description: The MIPI D-PHY digital power supply
> >
> > @@ -93,7 +91,8 @@ properties:
> > properties:
> > data-lanes:
> > description:
> > - Note that 'fsl,imx7-mipi-csi2' only supports up to 2
data lines.
> > + Note that 'fsl,imx7-mipi-csi2' only supports up to 2
data
> > + lines.
>
> Reformatting should be a separate patch.
Sure, I'll add new patch in next patchset.
>
> > minItems: 1
> > items:
> > - const: 1
> > @@ -115,7 +114,6 @@ required:
> > - interrupts
> > - clocks
> > - clock-names
> > - - power-domains
> > - ports
> >
> > additionalProperties: false
> > @@ -124,20 +122,73 @@ allOf:
> > - if:
> > properties:
> > compatible:
> > - contains:
> > - const: fsl,imx7-mipi-csi2
> > + const: fsl,imx7-mipi-csi2
>
> 'contains' was correct. It is more future proof when there is another SoC
that
> is backwards compatible with imx7.
Sure, I'll add new patch in next patchset.
>
> > then:
> > + properties:
> > + clocks:
> > + items:
> > + - description: The peripheral clock (a.k.a. APB clock)
> > + - description: The external clock (optionally used as the
pixel
> > + clock)
> > + - description: The MIPI D-PHY clock
> > + clock-names:
> > + items:
> > + - const: pclk
> > + - const: wrap
> > + - const: phy
> > + tesla,syscon-csis: false
> > + fsl,num-channels: false
>
> blank line
Will remove in nextpatchset.
>
> > required:
> > + - power-domains
> > - phy-supply
> > - resets
> > - else:
> > +
> > + - if:
> > + properties:
> > + compatible:
> > + const: fsl,imx8mm-mipi-csi2
> > + then:
> > properties:
> > clocks:
> > - minItems: 4
> > + items:
> > + - description: The peripheral clock (a.k.a. APB clock)
> > + - description: The external clock (optionally used as the
pixel
> > + clock)
> > + - description: The MIPI D-PHY clock
> > + - description: The AXI clock
> > clock-names:
> > - minItems: 4
> > + items:
> > + - const: pclk
> > + - const: wrap
> > + - const: phy
> > + - const: axi
> > + tesla,syscon-csis: false
> > + fsl,num-channels: false
> > phy-supply: false
> > resets: false
>
> blank line
>
> > + required:
> > + - power-domains
> > +
> > + - if:
> > + properties:
> > + compatible:
> > + const: tesla,fsd-mipi-csi2
> > + then:
> > + properties:
> > + clocks:
> > + items:
> > + - description: The peripheral clock (a.k.a. APB clock)
> > + - description: The DMA clock
>
> Wouldn't this be the same as the "AXI clock"?
According to v4.3 manual it is DMA clock.
>
> > + clocks-names:
> > + items:
> > + - const: pclk
> > + - const: aclk
> > + phy-supply: false
> > + resets: false
> > + power-domains: false
>
> blank line
Sure will remove in next patchset.
>
> > + required:
> > + - tesla,syscon-csis
> > + - fsl,num-channels
> >
> > examples:
> > - |
> > --
> > 2.49.0
> >
Regards,
Inbaraj E
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