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Message-ID: <TY1PR01MB1770A5603DE648612A5CA15EC0830@TY1PR01MB1770.jpnprd01.prod.outlook.com>
Date: Thu, 17 Jan 2019 13:19:06 +0000
From: Fabrizio Castro <fabrizio.castro@...renesas.com>
To: Simon Horman <horms@...ge.net.au>
CC: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Wolfgang Grandegger <wg@...ndegger.com>,
Marc Kleine-Budde <mkl@...gutronix.de>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Biju Das <biju.das@...renesas.com>,
Magnus Damm <magnus.damm@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Thierry Reding <treding@...dia.com>,
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Alexandre Belloni <alexandre.belloni@...tlin.com>,
Kevin Hilman <khilman@...libre.com>,
Johan Hovold <johan@...nel.org>,
Lukasz Majewski <lukma@...x.de>,
Michal Simek <monstr@...str.eu>,
Michal Vokáč <michal.vokac@...ft.com>,
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Ben Whitten <ben.whitten@...il.com>,
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"linux-renesas-soc@...r.kernel.org"
<linux-renesas-soc@...r.kernel.org>,
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Subject: RE: [PATCH 06/11] arm64: dts: renesas: r8a774c0-cat874: Add uSD
support
Hello Simon,
Thank you for your feedback!
> From: Simon Horman <horms@...ge.net.au>
> Sent: 17 January 2019 11:12
> Subject: Re: [PATCH 06/11] arm64: dts: renesas: r8a774c0-cat874: Add uSD support
>
> On Wed, Jan 16, 2019 at 06:37:49PM +0000, Fabrizio Castro wrote:
> > From: Biju Das <biju.das@...renesas.com>
> >
> > This patch adds uSD card support.
>
> Can I confirm that SDHI0 is wired up to a uSD slot?
Yes, it is wired up to a uSD slot
Thanks,
Fab
>
> I ask because if that is the case then this patch looks good to me.
> But if it is wired up to a full-size SD slot then I believe
> a wp-gpio (write protect) should be described.
>
> >
> > Signed-off-by: Biju Das <biju.das@...renesas.com>
> > Reviewed-by: Fabrizio Castro <fabrizio.castro@...renesas.com>
> > Reviewed-by: Chris Paterson <Chris.Paterson2@...esas.com>
> > ---
> > arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 50 +++++++++++++++++++++++++
> > 1 file changed, 50 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
> > index c545ce5..477a56b 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
> > @@ -7,6 +7,7 @@
> >
> > /dts-v1/;
> > #include "r8a774c0.dtsi"
> > +#include <dt-bindings/gpio/gpio.h>
> >
> > / {
> > model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
> > @@ -26,6 +27,29 @@
> > /* first 128MB is reserved for secure area. */
> > reg = <0x0 0x48000000 0x0 0x78000000>;
> > };
> > +
> > +vcc_sdhi0: regulator-vcc-sdhi0 {
> > +compatible = "regulator-fixed";
> > +
> > +regulator-name = "SDHI0 Vcc";
> > +regulator-min-microvolt = <3300000>;
> > +regulator-max-microvolt = <3300000>;
> > +regulator-always-on;
> > +regulator-boot-on;
> > +};
> > +
> > +vccq_sdhi0: regulator-vccq-sdhi0 {
> > +compatible = "regulator-gpio";
> > +
> > +regulator-name = "SDHI0 VccQ";
> > +regulator-min-microvolt = <1800000>;
> > +regulator-max-microvolt = <3300000>;
> > +
> > +gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
> > +gpios-states = <1>;
> > +states = <3300000 1
> > + 1800000 0>;
> > +};
> > };
> >
> > &extal_clk {
> > @@ -37,6 +61,18 @@
> > groups = "scif2_data_a";
> > function = "scif2";
> > };
> > +
> > +sdhi0_pins: sd0 {
> > +groups = "sdhi0_data4", "sdhi0_ctrl";
> > +function = "sdhi0";
> > +power-source = <3300>;
> > +};
> > +
> > +sdhi0_pins_uhs: sd0_uhs {
> > +groups = "sdhi0_data4", "sdhi0_ctrl";
> > +function = "sdhi0";
> > +power-source = <1800>;
> > +};
> > };
> >
> > &scif2 {
> > @@ -45,3 +81,17 @@
> >
> > status = "okay";
> > };
> > +
> > +&sdhi0 {
> > +pinctrl-0 = <&sdhi0_pins>;
> > +pinctrl-1 = <&sdhi0_pins_uhs>;
> > +pinctrl-names = "default", "state_uhs";
> > +
> > +vmmc-supply = <&vcc_sdhi0>;
> > +vqmmc-supply = <&vccq_sdhi0>;
> > +cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
> > +bus-width = <4>;
> > +sd-uhs-sdr50;
> > +sd-uhs-sdr104;
> > +status = "okay";
> > +};
> > --
> > 2.7.4
> >
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