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Date:   Thu, 1 Oct 2020 00:45:10 +0000
From:   Chris Packham <Chris.Packham@...iedtelesis.co.nz>
To:     "andrew@...n.ch" <andrew@...n.ch>,
        "vivien.didelot@...il.com" <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>
CC:     netdev <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: dsa: mv88e6xxx: serdes link without phy

Hi,

We have a chassis platform that (ab)uses an Ethernet backplane 
consisting of MV88E6097 on the line cards connecting to a MV98DX160 on 
the chassis controller(s).

I'm attempting to update the line cards to a modern kernel trying to do 
away with a lot of custom hackery from our older kernel. One problem I'm 
having is that I can't find a way of telling the DSA/MV88E6097 driver 
about the ports facing the backplane.

Currently I have the following in my dts

         switch@0 {
                 compatible = "marvell,mv88e6085";
                 #address-cells =  <1>;
                 #size-cells = <0>;
                 dsa,member = <0 0>;

                 reg = <0x1>;

                 ports {
                         #address-cells =  <1>;
                         #size-cells = <0>;

                         port@8 {
                                 reg = <8>;
                                 label = "internal8";
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                         port@9 {
                                 reg = <9>;
                                 label = "internal9";
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                         port@10 {
                                 reg = <10>;
                                 label = "cpu";
                                 ethernet = <&eth0port>;
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                 };
         };

The problem is that by declaring ports 8 & 9 as fixed link the driver 
sets the ForcedLink in the PCS control register. Which mostly works. 
Except if I add a chassis controller while the system is running (or one 
is rebooted) then the newly added controller doesn't see a link on the 
serdes. If I hack the code to clear the ForcedLink bit then the 
controller will correctly see the link state.

I think I need a way of telling the driver that it is directly wired 
(i.e. there is no PHY) but that it should not force the link state. I'm 
not sure that fixed-link is necessarily the right tool for the job but 
without it the driver complains about having no PHY on ports 8 and 9.

Any thoughts on how I can convey my hardware setup to the driver?

Thanks,
Chris

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